Job Description

Duties:

Join a diverse team of technical specialists developing and supporting deep-submicron IC development flows and tools. You will continuously improve flow quality, develop and deploy systems and design methodologies. Dealing with critical issues demanding immediate solutions or workarounds will be part of your daily challenge. When and where required, custom software development will be used to increase the efficiency and productivity of commercial tools. Monitoring performance optimization efforts of EDA software and advising on hardware changes to maximize overall productivity will also be part of the challenges you will face.

 

Our future colleague will be co-responsible for developing project environments, methodologies and mixed-signal design flows for IC and System design engineers. We expect you to provide technical training and support in the development of design flows for multi-site engineering teams using industry-standard EDA software such as Cadence, Mentor, Synopsys, Perforce, etc. You will assist in tool evaluation, tool selection, drive consensus, deployment, support, and flow development.

 

Skills:

  • Good understanding of Analog PDK’s and related collaterals
  • Proven communicator with a track record of delivering technical solutions and satisfying customers.
  • Deep understanding of project execution requirements
  • Strong ability to identify root causes of issues, define efficient solutions and plans to implement them.
  • Good understanding of PDKs (device libraries, techfiles, Analog Simulation, netlisting, spice models,)
  • Good knowledge of SKILL, SKILL-Pcells, CDFs, callbacks
  • Knowledge of UNIX shell, Shell scripting & programming, Excellent grasp of one of Perl or Python.
  • Good understanding of Cadence custom IC Virtuoso platform, Virtuoso-L and Virtuoso-XL, schematic capture and layout concepts.
  • Experience with working with foundries.
  • Good understanding Physical verification including DRC/LVS/Parasitic Extraction
  • Excellent communication skills with an ability to reduce complex info into easy to digest form for each other team members and implementation.
  • Hands-on knowledge of industry tools and techniques, like computer resources and job distribution tools
  • Data Management tool experience, perforce, GIT, SVN, or similar
  • An innovative, creative, lateral thinking problem solver
  • Comfortable handling multiple concurrent tasks

 

Education:

  • Completed university degree (Master/Diploma/PhD) in electrical engineering or a comparable subject or closely related field with 5 years of experience in IC design or CAD Engineering

 

Summary:

  • You are responsible for the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes.
  • Solid understanding of PDK’s, effectively manage PDK libraries, collaterals and drive migration of design environments for incremental releases.
  • Development of Calibre Physical Verification decks for cmos PLANAR and FINFET technologies including DRC, LVS, PERC, FILL LPE and shape generation decks and scripts.
  • Layout Automation and Utilities development in Cadence SKILL/SKILL++.
  • Hands-on experience is developing solutions in Perl/Python.
  • Development and validation of PV tools and flows like parasitic extraction, EMIR drop and substrate noise analysis.
  • Responsibilities will include testing, validation, customer support and new tool/methods evaluations, development of methods and procedures for quality improvement, automation of deck/techFiles generation and validation.
  • Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification rules and to troubleshoot errors.
  • Experience with physical verification tools for DRC, LVS and parasitic extraction, Calibre, starRC, ICV etc is plus.
  • Working knowledge of revision control software (Git, Perforce, Subversion, Synchronicity, etc)
  • Collaboration with the IT team to fulfil advanced nodes specific requests (Linux, Exceed-on-Demand, Grid, VMWare-ESX, Storage-system, etc.).
  • Ensuring the operation and support within the CAD / IT-team for all ASIC designers worldwide.
  • Managing the quality and ISO26262 requirements for the EDA tools, both for in-house developments and vendor products.

 

Qualifications:

  • Education: University degree (Bachelors/Master) in electrical engineering or a comparable subject
  • Personality and working practice: communicative, problem-solving mindset, responsible, initiative, flexible and target oriented. Comfortable in working in a fast paced, dynamic environment with changing priorities.
  • Experience and Knowledge: Minimum 3+ years of development experience of Mixed Signal CAD design Flows from Front to Back, expert knowledge and experience of state-of-the-art design tools (EDA-vendors e.g. Cadence, Synopsys, Mentor) and Software-development-methodologies and tools (Linux, script- and programming-languages as well as Cadence Skill), thorough understanding of Custom Analog development flow, design tools and Software / Hardware environment
  • Qualifications: ability to identify and analyse tasks efficiently within the scope of your work and to develop pragmatic application-specific solutions; pronounced ability to communicate, relevant experience in the methodology of problem solving as well as in the cooperation and leadership of international and cross-functional teams
  • Technical Skills: Cadence SKILL, Calibre SVRF/TVF, Python, Shell Scripting.
  • Languages: fluent in English written and spoken

 

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